module dmux21 (iS,iA,iB,oY);
parameter BITS = 4;
input iS;
input[BITS-1:0] iA,iB;
output[BITS-1:0] oY;
wire[BITS-1:0] oY, tA, tB;
assign tA = {BITS{~iS}}&iA;
assign tB = {BITS{iS}}&iB;
assign oY = tA | tB;
endmodule