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archive:nmk206 [2025/06/18 08:19] – [Lab Code (202425s2) Archive] azmanarchive:nmk206 [2025/06/18 08:23] (current) – [Lab Code (202425s2) Extra] azman
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 Complete template for a simple 4-bit processor core (as discussed during class) available {{ :archive:nmk206:nmk206-upcore_20250527.zip |here}}. Complete template for a simple 4-bit processor core (as discussed during class) available {{ :archive:nmk206:nmk206-upcore_20250527.zip |here}}.
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 +==== Lab Code (202425s2) Extra ====
 +
 +Here is an example code to utilize the carry/borrow signals of our add/subtract modules at ALU level. You may use this to create add-with-carry and subtract-with-borrow functions (hint: you need a selector signal to 'enable' the carry/borrow in signals {iC} and {iB}).
  
 <file verilog alu_flag_4b.v> <file verilog alu_flag_4b.v>
archive/nmk206.1750205983.txt.gz · Last modified: by azman