====== PGT104 - Digital Electronics ======

This course is //Digital Electronics//, offered by the Department of Electronics Engineering Technology.

The textbook for this course is [[http://www.pearsonglobaleditions.com/Sitemap/Floyd/|Floyd's Digital Fundamentals]] (11th Edition at the moment).

Try [[http://azman.unimap.edu.my/digitaljs/|my1digitaljs]] - a Basic Digital Electronics Simulator (notice, NOT logic simulator :p) that I have developed for PGT104. Based on [[https://github.com/kazuhikoarase/simcirjs|SimCirJS]], the source is available [[https://codeberg.org/azman/my1digitaljs|here]]. Some video guides are available [[https://www.youtube.com/playlist?list=PLKQoMxsWIO1yo5wpR6E9F2_chxlBuBrPK|on Youtube]]

//**Please note that this is a continuously updated site. Check the timestamps/dates (if any) to make sure that the information is applicable to current course implementation. Some information are from the previous ones.**//

===== Announcements =====

[20190130] Welcome to PGT104 Academic Session 2018/19 S2!

[20190226] Tentative date for Mid-Term is 21/03/2019 (THU)!

[20190307] Mid-Term Exam set on 19/03/2019 (TUE) @9.00pm

===== Lecture Slides =====

//Applicable for Academic Session 2018/2019 Semester 2//

  * Lecture Part 0 - {{:archive:pgt104:lecture_00.pdf|Course Introduction}}
  * Lecture Part 1 - {{:archive:pgt104:lecture_01.pdf|Introduction to Number Systems}}
  * Lecture Part 2 - {{:archive:pgt104:lecture_02.pdf|Logic Gates}}
  * Lecture Part 3 - {{:archive:pgt104:lecture_03.pdf|Boolean Algebra}}
  * Lecture Part 4 - {{:archive:pgt104:lecture_04.pdf|Combinational Logic Circuits}}
  * Lecture Part 5 - {{:archive:pgt104:lecture_05.pdf|Latches, Flip-flop and Timers}}
  * Lecture Part 6 - {{:archive:pgt104:lecture_06.pdf|Sequential Logic Circuits}}

//**Note**: Textbook coverage is as follows...//
^  Topic  ^  Chapter  ^  Sections  ^
|  1  |  2  | (2.1)-(2.10)  |
|  2  |  3  | (3.1)-(3.6)  |
|  3  |  4  | (4.1)-(4.8)  |
|  4  |  6  | (6.1)-(6.9)  |
|  5  |  7  | (7.1)-(7.6)  |
|  6  |  8-9  | (8.1)-(8.4), (9.2)-(9.3)  |

===== Lab Notes =====

  * Lab Work 1 - [[pgt104lab00|Basic Equipment/Components]] ([[pgt104lab00a|Part 1]],[[pgt104lab00b|Part 2]])
  * Lab Work 2 - [[pgt104lab01|Combinational Logic Circuits]] ([[pgt104lab01a|Part 1]],[[pgt104lab01b|Part 2]],[[pgt104lab01c|Part 3]])
  * Lab Work 3 - [[pgt104lab02|Sequential Logic Circuits]] ([[pgt104lab02a|Part 1]], [[pgt104lab02b|Part 2]], [[pgt104lab02c|Part 3]])
  * Lab Work 4 - (Free sessions) Shift registers and counters (theory to practical)

===== Assignments =====

  * {{:archive:pgt104:pgt104-201819s2_assignment1.pdf|Assignment 1}}
    * Please attach this page (with your name and student ID) in front of your answer sheets. 
    * **Due: 14/03/2019 (THU-W6-Lecture Session)**.
  * {{:archive:pgt104:pgt104-201819s2_assignment2.pdf|Assignment 2}}
    * Please attach this page (with your name and student ID) in front of your answer sheets. 
    * **Due: 09/05/2019 (THU-W13-MY_ROOM@[S4-L1-70]-12PM)**.

===== Course Synopsis =====

//Note: Written by the course coordinator when first offered//

//Introduction and discussion of fundamental of digital circuit design and analysis. The lecture and tutorial exercise covers the following topics: Boolean Algebra, Numbering System, Basic Logic Gates, Combinational Circuit Design, Timing Diagram, Bi-Stable Memory Device and Sequential Circuit Design.//

===== Course Outcome =====

//Note: These have been slightly re-written from the original/previous session//

  * CO1: Ability to describe numbering systems and boolean algebra
  * CO2: Ability to analyze Boolean expressions and logic circuits for a simple digital system
  * CO3: Ability to design combinational or sequential logic circuits for a simple digital system

===== Course Assessment =====

^  ^  Examinations  ^^  Course Work  ^^
^  Total Contribution  |  60%  ||  40%  ||
^  Assessment  |  Mid-Term  |  Final Exam  |  Assignments  |  Lab Assessments  |
^  Contribution  |  10%  |  50%  |  10%  |  30%  |

===== Course Syllabus =====

^  Week  ^  Lecture  ^  Laboratory  ^  Notes  ^
^  Week 01  | <WRAP>
  * Course Introduction ({{:archive:pgt104:lecture_00.pdf|Lecture 00}})
    * introduction to digital electronics
  * Introduction to Numbering Systems ({{:archive:pgt104:lecture_01.pdf|Lecture 01}})
    * decimal numbers, binary numbers
    * conversions, binary arithmetic
    * value and representation
    * hexadecimal and octal numbers
    * binary-coded decimal
</WRAP>  | <WRAP>
Lab Work 1
</WRAP>  | <WRAP>
Textbook: Chapter 2
</WRAP>  |
^  Week 02  | <WRAP>
  * Logic Gates ({{:archive:pgt104:lecture_02.pdf|Lecture 02}})
    * Boolean Logic, Inverter
    * (N)AND, (N)OR, X(N)OR gates
</WRAP>  | <WRAP>
Lab Work 1 (cont.)
</WRAP>  | <WRAP>
Textbook: Chapter 3
</WRAP>  |
^  Week 03  | <WRAP>
  * Boolean Algebra ({{:archive:pgt104:lecture_03.pdf|Lecture 03}})
    * Boolean operations and expressions
    * DeMorgan's Theorems
    * logic simplification
</WRAP>  | <WRAP>
Lab Work 2
</WRAP>  | <WRAP>
Textbook: Chapter 4

**Assignment 1 Queue**
</WRAP>  |
^  Week 04  | <WRAP>
  * Boolean Algebra (cont.) ({{:archive:pgt104:lecture_03.pdf|Lecture 03}})
    * standard forms: SOP, POS
    * truth table and Karnaugh Map
</WRAP>  | <WRAP>
Lab Work 2 (cont.)
</WRAP>  | <WRAP>
Textbook: Chapter 4
</WRAP>  |
^  Week 05  | <WRAP>
  * Boolean Algebra (cont.) ({{:archive:pgt104:lecture_03.pdf|Lecture 03}})
    * practical problems & solutions
</WRAP>  | <WRAP>
Lab Work 2 (cont.)
</WRAP>  | <WRAP>
Textbook: Chapter 4

**Assignment 1 Due (5%)**
</WRAP>  |
^  Week 06  | <WRAP>
  * Combinational Logic Circuits ({{:archive:pgt104:lecture_04.pdf|Lecture 04}})
    * half & full adders
    * carry circuits
    * comparators
</WRAP>  | <WRAP>
Lab Work 2 (cont.)
</WRAP>  | <WRAP>
Textbook: Chapter 6

**Lab Assessment 1 (10%)**
</WRAP>  |
^  Week 07  | <WRAP>
  * Combinational Logic Circuits (cont.) ({{:archive:pgt104:lecture_04.pdf|Lecture 04}})
    * decoders, encoders
    * multiplexer, demultiplexer
</WRAP>  | <WRAP>
Lab Work 2 (cont.)
</WRAP>  | <WRAP>
Textbook: Chapter 6

**Mid-term Examination (10%)**
</WRAP>  |
^  Week 08  | <WRAP>
  * Combinational Logic Circuits (cont.) ({{:archive:pgt104:lecture_04.pdf|Lecture 04}})
    * applications in digital systems
</WRAP>  | <WRAP>
Lab Work 2 (cont.)
</WRAP>  | <WRAP>
Textbook: Chapter 6
</WRAP>  |
^  Week 09  | <WRAP>
  * Latches, Flip-flops, and Timers ({{:archive:pgt104:lecture_05.pdf|Lecture 05}})
    * latches & flip-flops
</WRAP>  | <WRAP>
Lab Work 3
</WRAP>  | <WRAP>
Textbook: Chapter 7

**Assignment 2 Queue**
</WRAP>  |
^  Week 10  | <WRAP>
  * Latches, Flip-flops, and Timers (cont.) ({{:archive:pgt104:lecture_05.pdf|Lecture 05}})
    * one-shots and oscillators
</WRAP>  | <WRAP>
Lab Work 3 (cont.)
</WRAP>  | <WRAP>
Textbook: Chapter 7

**Lab Assessment 2 (10%)**
</WRAP>  |
^  Week 11  | <WRAP>
  * Latches, Flip-flops, and Timers (cont.) ({{:archive:pgt104:lecture_05.pdf|Lecture 05}})
      * applications in digital systems
</WRAP>  | <WRAP>
Lab Work 3 (cont.)
</WRAP>  | <WRAP>
Textbook: Chapter 7

**Assignment 2 Due (5%)**
</WRAP>  |
^  Week 12  | <WRAP>
    * Sequential Logic Circuits ({{:archive:pgt104:lecture_06.pdf|Lecture 06}})
      * shift registers (load, shift left, shift right)
</WRAP>  | <WRAP>
Lab Work 3 (cont.)
</WRAP>  | <WRAP>
Textbook: Chapter 8-9
</WRAP>  |
^  Week 13  | <WRAP>
    * Sequential Logic Circuits (cont.) ({{:archive:pgt104:lecture_06.pdf|Lecture 06}})
      * counters (asynchronous, synchronous)
</WRAP>  | <WRAP>
Lab Work 3 (cont.)
</WRAP>  | <WRAP>
Textbook: Chapter 8-9
</WRAP>  |
^  Week 14  | <WRAP>
    * Sequential Logic Circuits (cont.) ({{:archive:pgt104:lecture_06.pdf|Lecture 06}})
      * applications in digital systems
</WRAP>  | <WRAP>
Lab Work 3 (cont.)
</WRAP>  | <WRAP>
Textbook: Chapter 8-9

**Lab Assessment 3 (10%)**
</WRAP>  |

===== Once Upon a Time in PGT104 =====

//**20170526** Project Demonstration: A Car-Wash System using a state-machine built with discrete logic gates//

{{:archive:pgt104:pgt104_lab_project_ry44_grade_a_pic0.jpg?nolink&400}}
{{:archive:pgt104:pgt104_lab_project_ry44_grade_a_pic1.jpg?nolink&400}}
{{:archive:pgt104:pgt104_lab_project_ry44_grade_a_pic2.jpg?nolink&400}}

Short video clip (//sorry, no audio//)

{{:archive:pgt104:pgt104_lab_project_ry44_grade_a.mp4}}

===== Digital Electronic Lab Kit =====

<file text pgt104_labkit.txt>
Basic Gates / IC:
- 2 x 7400 - Quad 2-input NAND
- 1 x 7404 - Hex INVERTER
- 1 x 7408 - Quad 2-input AND
- 1 x 7402 - Quad 2-input NOR
- 1 x 7432 - Quad 2-input OR
- 1 x 7486 - Quad 2-input XOR
- 2 x 7474 - Dual D Flip-flop (async P/C)
- 1 x 7476 - Dual JK Flip-flop (async P/C)
- 1 x 555 - Timer

Basic Components:
- 4 x LED (Red/Green)
- 4 x Push/Reset Button
- 1 x 4-Way DIP Switch
- 12 x 1k Resistor
- 1 x 7-segment
- 8 x 220ohm Resistor
- 2 x 100k Resistor
- 2 x 10k Resistor
- 1 x 10uF Capacitor
- 1 x 1uF Capacitor
- 1 x 10nF Capacitor

Prototyping:
- Breadboard
- Jumper wires (M-M) 
- @ 4 long wires for power
- @ 8 medium length for inter-IC
- @ 38 short length for direct wiring
</file>

===== Food for Thought =====

A more practical implementation of Digital Electronic Courses:

  * Digital 1
    * base-n numbering systems
    * basic logic (truth table, boolean equation, boolean algebra, POS/SOP form)
    * combinational logic (basic gates)
    * combinational logic implementation (e.g. adder) <- just pick one example
    * sequential logic (basic flip-flop)
  * Digital 2 :
    * combinational logic circuits (mux, decoder, encoder)
    * practical application: e.g. instruction decoder, address decoding, etc.
    * sequential logic circuits (registers, counters)
    * practical application: e.g. program counter
    * state machines

//**Note:** If Digital 1 is seen as too light, the combinational logic circuits topic from 2 can be shifted into 1... then, some basic Computer Architecture stuffs can be put into 2.//

Maybe something like this...

^  Digital Electronics 1  ^^^^
^  Week  ^  Lecture  ^  Laboratory  ^  Notes  ^
^  Week 01 - 03  | <WRAP>
  * Introduction to Digital Electronics
  * Numbering Systems
    * decimal numbers, binary numbers
    * conversions
    * basic binary arithmetic
    * hexadecimal and octal numbers
    * binary-coded decimal
  * Logic Gates
    * Boolean Logic, Inverter
    * (N)AND, (N)OR, X(N)OR gates
  * Numbering Systems (cont.)
    * unsigned and signed binary
    * signed binary arithmetic
</WRAP>  | <WRAP>
</WRAP>  | <WRAP>
//Comment1: Need to cover topic on **Logic Gates** as soon as possible in order to start with lab sessions.//

//Comment2: Previous experience show students need more time on topics involving signed binaries.//
</WRAP>  |
^  Week 04 - 07  | <WRAP>
  * Boolean Algebra
    * Boolean operations and expressions
    * DeMorgan's Theorems
    * Logic simplification/reduction
    * standard forms: SOP, POS
    * truth table and Karnaugh Map
</WRAP>  | <WRAP>
</WRAP>  | <WRAP>
</WRAP>  |
^  Week 08 - 11  | <WRAP>
  * Combinational Logic Circuits
    * 1-bit half & full adder
    * 4-bit adders (ripple carry)
    * carry circuit (carry look ahead)
</WRAP>  | <WRAP>
</WRAP>  | <WRAP>
</WRAP>  |
^  Week 12 - 14  | <WRAP>
  * Latches, Flip-flops, and Timers
    * latches
    * timing diagrams
    * flip-flops (JK-FF, D-FF, T-FF)
    * basic 555 timer
</WRAP>  | <WRAP>
</WRAP>  | <WRAP>
</WRAP>  |
^  Digital Electronics 2  ^^^^
^  Week  ^  Lecture  ^  Laboratory  ^  Notes  ^
^  Week 01 - 02  | <WRAP>
  * Refresh Basic Digital Electronics
    * combinational & sequential
    * boolean algebra, timing diagrams
  * Combinational Logic Circuits
    * adder, subtractor, binary comparator
</WRAP>  | <WRAP>
</WRAP>  | <WRAP>
</WRAP>  |
^  Week 03 - 05  | <WRAP>
  * Combinational Logic Circuits
    * Decoders, encoders
    * Multiplexers, demultiplexers
</WRAP>  | <WRAP>
</WRAP>  | <WRAP>
</WRAP>  |
^  Week 06 - 07  | <WRAP>
  * Refresh Sequential Logic Elements
    * latches/flip-flops
  * Shift Registers (left/right/load)
</WRAP>  | <WRAP>
</WRAP>  | <WRAP>
</WRAP>  |
^  Week 08 - 09  | <WRAP>
  * Counters
    * Basic binary counter (up/down)
    * Gray Counter
</WRAP>  | <WRAP>
</WRAP>  | <WRAP>
</WRAP>  |
^  Week 10 - 12  | <WRAP>
  * Finite State Machine
    * Mealy/Moore Machine
    * State diagrams
    * State encoding
    * Next-state logic
</WRAP>  | <WRAP>
</WRAP>  | <WRAP>
</WRAP>  |
^  Week 13 - 14  | <WRAP>
  * Simple Digital Systems (Case studies)
    * digital control system (e.g. train crossing gate control)
</WRAP>  | <WRAP>
</WRAP>  | <WRAP>
</WRAP>  |